Non-volatile NAND-based Flash memory systems are widely used in modern digital computing devices, such as mobile phones, digital cameras, digital camcorders, computers, and many other digital computing devices. In current NAND-based Flash memory systems, a multi-level cell (MLC) can be operated to store 2 or 3 bits per cell. With this advancement in MLC use, it becomes necessary to apply a memory programming plan to eliminate data corruption as a result of various effects, such as the so-called Yupin effect as described in U.S. Patent Application Publication No. US 2003/0235078.
Such a memory programming plan includes directing specific operations toward the NAND-based Flash memory in order to complete an MLC programming step. Additionally, in eX2 Flash technology where 2 bits are stored in each MLC, there is a tight connection between lower and upper pages. In this situation, if a power failure occurs during programming of the upper page, the lower page might be affected. Due to the above-mentioned reasons, among others, operation of eX2, ex3, etc., NAND-based Flash memory often includes holding enough host data in single-level cell (SLC) mode before completing an MLC programming step to ensure data recoverability. Such holding of data in SLC mode is referred to as operation of a “safe-zone.” It is within this context that the present invention arises.